NICOLAS MESEGUER

Ph.D. Student · Computer Architecture
University of Murcia · Murcia, Spain
<n.mesegueriborra@um.es>

About

I am a computer architect. In practice, that means I spend most of my day waiting for simulations to finish.

Ph.D. student in Computer Architecture within the CAPS group at the University of Murcia, advised by Manuel E. Acacio and José L. Abellán, funded by Fundación Séneca. I study how GPUs move data asynchronously through the Tensor Memory Accelerator (TMA) and the ecosystem built around it: Tensor Cores, Tensor Memory (TMEM), and so on. My research proposes ways to improve performance by efficiently overlapping the load-compute-store pipeline and achieving higher throughput. Most of that work happens inside MGPUSim.

I completed my M.S. in High Performance Architectures and Supercomputing at the University of Murcia in 2022, and my B.S. in Computer Engineering in 2021, where I received the Extraordinary Award for the best academic performance.

CV: NicolasMeseguerCV.pdf  [updated 08/2026]

News

• Aug 2026 Just arrived in the US to start my pre-doctoral research stay at the AALP Lab with Prof. Tim Rogers.
• Jun 2026 Nuria Martínez Alburquerque defended her B.S. thesis on data prefetching for GPUs — 9.9, Outstanding with Honours.
• May 2026 Best Poster Award (jury selection) at the XIII G9 Doctoral Symposium, after being selected as one of ten university-wide representatives for the University of Murcia. [1] [2] [3]
• Apr 2026 Awarded a competitive Fundación Séneca fellowship for a pre-doctoral research stay at the AALP Lab, Purdue University, hosted by Prof. Tim Rogers. [1]
• Feb 2026 QuCo presented at HPCA 2026, Sydney, Australia.
• Jun 2025 Paper presented at the XXXV Jornadas de Paralelismo (SARTECO), Sevilla, Spain.
• Mar 2025 ACTA presented at GPGPU 2025, Las Vegas, Nevada, USA.

Publications

2026

@INPROCEEDINGS{11408440,
  author    = {Meseguer, Nicolás and Xu, Daoxuan and Sun, Yifan and
               Pellauer, Michael and Abellán, José L. and Acacio, Manuel E.},
  booktitle = {2026 IEEE International Symposium on High Performance
               Computer Architecture (HPCA)},
  title     = {QuCo: Efficient and Flexible Hardware-Driven Automatic
               Configuration of Tile Transfers in GPUs},
  year      = {2026},
  pages     = {1-14},
  doi       = {10.1109/HPCA68181.2026.11408440}
}

2025

@article{2025acta,
  author  = {Meseguer, Nicolas and Sun, Yifan and Pellauer, Michael and
             Abellán, José L. and Acacio, Manuel E.},
  year    = {2025},
  month   = {June},
  title   = {Configuración Automática del TMA para GPUs de Alto Rendimiento},
  journal = {XXXV Jornadas de Paralelismo}
}

2023

@article{2023cpupcgcn,
  author  = {Meseguer-Iborra, Nicolas and Abellán, José L. and
             Acacio, Manuel E.},
  year    = {2023},
  month   = {July},
  title   = {CPU-PCGCN: Efficient Processing of Convolutional Graph Networks
             on CPU Architectures},
  journal = {Advanced Computer Architecture and Compilation for
             High-performance Embedded Systems},
  volume  = {19},
  pages   = {5--8},
  isbn    = {978-90-7842-704-9}
}

2022

@article{2022cpupcgcn,
  author  = {Meseguer-Iborra, Nicolas and Muñoz-Martínez, Francisco and
             Abellán, José L. and Acacio, Manuel E.},
  year    = {2022},
  month   = {June},
  title   = {CPU-PCGCN: Procesamiento Eficiente de Redes Convolucionales de
             Grafos en Arquitecturas CPU},
  journal = {Avances en Arquitectura y Tecnología de Computadores},
  volume  = {32},
  pages   = {445--453},
  isbn    = {978-84-1302-185-0}
}

2021

@article{2021dlrm,
  author  = {Meseguer-Iborra, Nicolas and Muñoz-Martínez, Francisco and
             Acacio, Manuel E. and Abellán, José L.},
  year    = {2021},
  month   = {June},
  title   = {Evaluación de un Sistema de Recomendación en un Acelerador Híbrido},
  journal = {Avances en Arquitectura y Tecnología de Computadores},
  volume  = {31},
  pages   = {107--115},
  isbn    = {978-84-09-32487-3}
}

Awards & Honours

• May 2026 Best Poster Award (jury selection), XIII G9 Doctoral Symposium. Selected through a competitive university-wide call (10 places) to represent the University of Murcia. [1] [2] [3]
• Apr 2026 Competitive Pre-Doctoral Research Fellowship (Fundación Séneca) for a research stay abroad at the AALP Lab, Purdue University. [1]
• Mar 2024 3rd place, Telefónica Hack4Good 2024, with a comprehensive telemedicine platform involving several stakeholders. [1] [2]
• Dec 2022 Programa Séneca 2022 — research contract at the University of Murcia. [1] [2]
• Nov 2022 2nd place, Mercedes-Benz Talent Highway, with a predictive analytical market model. [1] [2]
• Nov 2022 University scholarship for the master's degree (M.S.). [1]
• Oct 2022 1st place, Telefónica Hack4Good 2022, with an application against food waste. [1] [2] [3]
• Jun 2022 Extraordinary Award for the best academic record in Computer Engineering (B.S.). [1]
• Feb 2021 Research Initiation Scholarship for promising young researchers. [1]
• Mar 2018 Erasmus+ Scholarship for a European internship. [1]

Education

• 2022–2026
  Ph.D. in Computer Architecture
  University of Murcia.
  Dissertation: TBD (mid 2027).
• 2021–2022
  M.S. in High Performance Architectures and Supercomputing
  University of Murcia · 9.24 · 60 ECTS.
  Design of high-performance multi-core architectures (core microarchitecture, caches, interconnection network), cache coherence protocols, performance and power trade-offs, parallel programming standards (OpenMP, MPI, MPI+OpenMP, OpenMP+CUDA), efficient matrix libraries (BLAS, Intel MKL, cuBLAS, ScaLAPACK) and HPC system administration.
  Thesis: CPU-PCGCN, efficient processing of graph convolutional networks on CPU architectures · code
• 2019–2020
  Intern Student, Machine Learning and Deep Learning
  Catholic University of Murcia (UCAM) · 12 ECTS.
  Developed a fully connected network and a CNN in C, improving cache efficiency (dynamic memory, pointers, memory registers) and matrix operations. Openly distributed, fully modular.
  Code: github.com/NicolasMeseguer/DNN
• 2018–2021
  B.S. in Computer Engineering (Hons)
  Catholic University of Murcia (UCAM) · 9.3 · 240 ECTS.
  Data structures, algorithms, databases, parallel programming (OpenMP and CUDA), computer architecture (MIPS, Von Neumann model, pipelining, multicycle and single-cycle), calculus and linear algebra, networks, operating systems, computer security, software engineering and intelligent systems.
  Thesis: Implementation and evaluation of the DLRM model in an ASIC accelerator simulated by STONNE
• 2016–2018
  HNC in Web Application Development
  IES José Planes · 8.8 · 120 ECTS.
  Developing, deploying and maintaining web applications (MVC), with secure data access and compliance with accessibility, usability and quality standards.

Teaching

Teaching Assistant at the University of Murcia (lab sessions), 3.00 ECTS per course.

• Multi-core and Purpose-built Architectures (AMPE)
  Spring 2026 · Spring 2025 · Spring 2024 · Spring 2023
  @AMPE_UMU
• Introduction to Operating Systems (ISO)
  Fall 2025 · Fall 2024 · Fall 2023

Students

• Sep 2025 – Jun 2026
  Implementation and Evaluation of Data Prefetching Schemes on a GPU Architecture
  Nuria Martínez Alburquerque <n.martinezalburquerque@um.es>
  9.9 — Outstanding with Honours.
• Sep 2022 – Jun 2023
  Register Bank Modeling on GPUs with MGPUSim
  José Ángel Nicolás Ortega <joseangel.nicolaso@um.es>
  9.9 — Outstanding with Honours.

Links